Voltage controlled attenuator using PN diodes

ABSTRACT

A fully integrator RF attenuator performs gain control upon a received RF signal without the use of an off-silicon PIN diode. The attenuator includes a T-configuration pad in conjunction with a current source. A direct current signal biases a shunt element in the T-pad. Preferably, a voltage control signal which controls the direct current is generated as a negative feedback signal in proportion to the magnitude of the RF detected at the attenuator output.

FIELD OF THE INVENTION

The present invention relates to a wholly integrated analog voltage controlled attenuator.

DESCRIPTION OF THE RELATED ART

Radio-frequency (RF) signal attenuators are typically used in cable television (CATV) and video applications. RF attenuators, therefore, must operate over a broad bandwidth, e.g., from below 1 megahertz to the gigahertz range, and display accuracy to fractions of a dB. An RF attenuator may or may not include the use of automatic gain control to control RF signal attenuation. With automatic gain control, the RF signal output from the attenuator is consistently maintained at a particular amplitude regardless of the signal's input amplitude, e.g., to prevent saturation from over-large signals. RF attenuators typically employ one or several T-attenuator or Pi-attenuator sections, and include electronic switching elements to select or bypass the attenuator sections. PIN diodes are frequently used to provide the switching. PIN diodes display low capacitance in the off state and are therefore ideal for high-speed switching; e.g., U.S. Pat. No. 4,359,699, issued Nov. 16, 1992.

T-pad or π attenuator sections typically include a variable resistance to shunt over-large portions of a received RF signal to ground. PIN diodes, while used as high-speed switching elements, are also used to provide such variable resistance. The resistance of a PIN diode varies in proportion to an amount of biasing current flowing through it. Examples of PIN-diode-based attenuators are disclosed in the following patents: U.S. Pat. No. 5,270,824, issued Dec. 14, 1993, U.S. Pat. No. 5,204,643, issued Apr. 20, 1993, U.S. Pat. No. 5,126,703, issued Jun. 30, 1992, U.S. Pat. No. 4,654,610, issued Mar. 31, 1987, and U.S. Pat. No. 5,140,200, issued Aug. 18, 1992,

PIN-diode-based attenuators, however, although widely used, are not without problems. For example, the central frequency of PIN diode characteristics changes with the PIN diode's changing resistance. In addition, PIN diodes display nonlinear attenuation as a function of tuning voltage characteristics, requiring complex circuitry for nonlinearity adjustment. Further, PIN diodes are not readily incorporated into existing silicon technologies, in particular, integrated analog voltage controlled attenuators, not only because of routing and space allocation complications, but because substrate resistivities are not high enough to be useful as an intrinsic layer when formed in an ion-implant Si process. In addition, diffusions from the implants and subsequent annealing during the Si fabrication process would not allow formation of a well-controlled intrinsic region even if the substrate resistivities were high enough.

SUMMARY OF THE INVENTION

A conventional approach for providing RF signal attenuation for CATV and video applications includes varying the resistance of a PIN-diode to shunt away various amounts of the received RF signal. PIN diodes, however, cannot be integrated into existing silicon technologies. A fully integrated RF voltage controlled attenuator is provided by the present invention which operates without the need for off-silicon PIN diodes. The RF attenuator displays linear attenuation characteristics with a linearly applied tuning voltage over a broad bandwidth. To do so, a pn junction diode is provided as part of an integrated circuit to control an amplitude of the circuit's RF output.

In a preferred embodiment, the amplitude of the attenuator output signal is constantly and accurately maintained at a specified level by use of automatic gain control implemented within the RF attenuator. The analog or RF automatic gain control maintains signal gain by adjusting the variable resistance of a T-pad attenuator shunt element. The signal attenuation varies with the varying resistance of the shunt element, which follows the magnitude of a DC signal, I_(DC), provided to it as bias. The RF shunt element is preferably a pn junction diode and therefore integrable within the attenuator by existing silicon technology. I_(DC) is generated in direct proportion to the amplitude of a voltage control signal, V_(DC), the control signal fed back from the RF output. V_(DC) is directly proportional to the amplitude of the RF output signal. The need to implement the shunt element as a conventional off-silicon PIN diode is obviated by use of the integrated pn junction diode.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic block diagram of an RF signal attenuator of this invention;

FIG. 2 is a schematic circuit diagram of the attenuator depicted in FIG. 1;

FIG. 3A is detailed schematic diagram the attenuator depicted in FIG. 2;

FIG. 3B is an enlarged view of a portion of the schematic of FIG. 3A;

FIG. 4 is a schematic block diagram of the preferred embodiment of the RF attenuator of this invention;

FIG. 5 is a plot of attenuation versus control voltage for the preferred embodiment of this invention; and

FIG. 6 is a plot of attenuation versus frequency for the preferred embodiment of this invention.

DETAILED DESCRIPTION OF THE INVENTION

Automatic gain control circuits are conventionally used in the front end of receivers to compensate for variations in the level of various received signals. Within a receiver, the automatic gain control circuit detects an amplitude of a received, IF signal. A DC voltage signal is generated thereat in proportion to the amplitude of the IF signal. The DC voltage signal is fed back to the input stage of the front end to provide a gain to (adjust or attenuate) the received IF signal. More specifically, the DC voltage signal is utilized to generate a current to bias, for example, a PIN diode. The PIN diode would be connected from the front end stage to ground to drain off some portion of the received RF signal if the signal were over-large.

A schematic block diagram of an RF attenuator of this invention is shown in FIG. 1. The invention shown therein includes an RF T-pad section 10 electrically connected to a controlled current source 20. RF T-pad section 10 includes a port RF_(IN) for receiving analog or RF signals, and a port RF_(OUT) for outputting a gain-adjusted version of the received signal. Analog or RF signals are received at the RF T-pad and attenuated within the RF T-pad, if necessary, to prevent saturation of receiver circuitry to which port RF_(OUT) is connected. To do so, part of the over-large, received RF signal power is shunted away in accordance with a control current signal I_(DC).

The pad or shunt element within the T-pad includes a pn junction diode D₁ such that the attenuator may be fully integrated. The current control signal I_(DC) is generated within a controlled current source in proportion to a voltage control signal, V_(DC), provided to the source's input port, P_(C). I_(DC) controls the attenuation provided by the T-pad section. I_(DC), i.e., the amount of attenuation may be provided within the present invention, by use of automatic gain control (to be discussed in greater detail with reference to the preferred embodiment) which adjusts the attenuation level in accordance with the magnitude of the RF output signal.

FIG. 2 is a detailed version of the attenuator depicted in FIG. 1. In FIG. 2, the controlled current source 20 of FIG. 1 is replaced by a voltage-controlled current source 20'. The voltage-controlled source 20' is electrically connected to a voltage control port, P_(c), a power source, V_(cc), and to DC input port, DC_(in), of RF T-pad section 10.

RF T-Pad section 10 includes an RF input port, RF_(in), connected through a first DC blocking capacitor, C_(in), and a first resistor, R_(in), to an anode end of an RF shunt element, junction diode D₁. The anode end of junction diode D₁ is also electrically connected to a second resistor, R_(OUT), a second DC blocking capacitor, C_(OUT) and an RF output port, RF_(OUT). Cathode end of diode D₁ is connected to ground. The first resistor, R_(in), and second resistor, R_(out), are either fixed or variable resistors to aid in adjusting the junction's resistance.

The current, I_(DC), flowing through the shunt element, junction diode D₁, defines the junction's resistance. I_(DC) _(IN) flows into the T-pad 10 through DC_(IN) to the anode end of junction diode D₁. I_(DC) controlled by adjusting the magnitude of the voltage control signal, V_(DC), provided to voltage control port, P_(C). The DC blocking capacitors prevent I_(DC) from flowing towards the RF input and output, such that substantially all of I_(DC) is directed through pn junction diode D₁. The junction diode's resistance is adjusted thereby.

As mentioned above, V_(DC), is preferably generated in proportion to the amplitude of the RF signal detected at the RF output port, essentially forming a feedback loop for automatic gain control. The invention, however, is not limited to an attenuator requiring automatic gain control for adjusting the amplitude of the RF output signal. Varying V_(DC) varies I_(DC), all that is needed to control the amplitude of the RF output signal. V_(DC) may be generated and provided to the voltage control port P_(c) by an means known to those skilled in the art.

FIG. 3A is a detailed schematic circuit diagram of the RF attenuator circuit of FIG. 2, which is easily implemented as an all-silicon integrated design. Voltage-controlled current source 20' generates the attenuation control signal, I_(DC), as follows. A voltage control signal V_(DC) is provided to voltage control port P_(C). V_(DC) across a resistor R₁ generates a biasing current which flows into a base of an NPN transistor Q₁. The current generated in a collector of Q₁ in response to the base current essentially defines I_(DC). An emitter of transistor Q₁ is connected through a resistor R₂ to AC ground to sink I_(CQ1). The collector current, I_(CQ1), flows from an emitter of a diode-connected NPN transistor Q₂. The current flows into collector of Q₂ from the emitter of NPN diode-connected transistor Q₃. Both transistors Q₂ and Q₃ are diode-connected. Shorting the base and collector of a BJT transistor, i.e., an NPN such as transistors Q₂ and Q₃, results in a two-terminal device displaying i-v characteristics identical to the i_(E) -V_(BE) of the transistor. Because BJT transistors connected as such remain in active mode (V_(CB) =0 provides for active mode operation), the current drawn into the collector and base are split in accordance with the transistors β.

Collector and base of transistor Q₃ are connected to both the collector and base of PNP transistor Q₄, as well as the base of PNP transistor Q₅. Transistors Q₄ and Q₅ form a current mirror. Accordingly, the current flowing through transistor Q₄ (proportional to the control voltage signal V_(DC)), is mirrored in transistor Q₅ and defines I_(DC). Transistors Q₄ and Q₅ are matched transistors, and Q₄ is diode connected. As long as transistor Q₅ remains active, the current through the collector of Q₅ will always equal the current through Q₄, independent of V_(cc). The emitters of transistors Q₄ and Q₅ are also electrically connected through a RF choke L₁ to V_(CC), and also through a bypass capacitor C₃ to ground.

The bias current, I_(DC), flows from the collector of transistor Q₅ into an active load, AL1, formed by an array of diode-connected transistors Q₆ -Q₁₃. The emitter of transistor Q₁₃, the last transistor within the array, is connected to diode D₁. Diode D₁ is the base-emitter junction of diode-connected transistor Q₁₄. Accordingly, I_(DC) biases diode D₁ in accordance with V_(DC).

A more detailed view of active load AL1 is presented in FIG. 3B. The biasing current flows into the active load via the collector and base (diode-connected) of NPN transistor Q₆. The emitter of transistor Q₆ is connected to diode-connected NPN transistor Q₇. The emitter of transistor Q₇ is electrically connected to diode-connected transistor Q₈, which is in turn connected at its emitter to diode-connected transistor Q₉, and so on through transistor Q₁₃, i.e., Q₉ -Q₁₃. I_(DC) flows from the emitter of Q₁₃ into diode D₁.

The effect of I_(DC) on diode D₁, and, therefore, the T-pad 10 will now be discussed. RF signals received at RF_(IN), pass through capacitor C_(IN) and R_(IN) to the anode of diode D₁. At that point in the circuit, the RF is riding on the DC bias, and splits between the RF output path and diode D₁ to ground. I_(DC) flowing through D₁ varies the diode resistance and therefore the amount of the received RF signal routed to ground. The remainder of the RF signal passes through R_(OUT) and C_(OUT) to an AC load (i.e., via RF_(OUT)). The voltage control signal V_(DC) provided to control port P_(c) is preferably generated in proportion to the amplitude of the RF output signal present at RF_(OUT).

The variable attenuation provided by the pn junction of diode-connected transistor Q₁₄, is, ignoring mismatch loss terms,

    k=Z.sub.O R.sub.PN +((Z.sub.O).sup.2 /(R.sub.PN).sup.2 +1).sup.1/2

where Z_(O) =50 ohms and R_(PN) is the resistance of the shunt element, diode D₁. For control voltage V_(DC) across the BE junction of transistor Q₁ through resistor R₁ (when V_(DC) is above the knee of the junction), the current I_(CQ1) flowing through the collector of Q₁ (the effective D₁ control current, I_(DC)) is

    (V.sub.DC -0.7)/R.sub.2,

which is the control current for a linear portion of the tuning range. The diode resistance of the BE junction of transistor Q₁₄ (diode D₁) is

    V.sub.T /I.sub.DC,

when the applied voltage is greater than approximately 0.7 volts and where V_(T) =(26×10⁻³) volts. The attenuation of the shunt element, D₁, is therefore

    Z.sub.O I.sub.DC /V.sub.T +[Zo.sup.2 (I.sub.DC).sup.2 /V.sub.T.sup.2 +1].sup.1/2.

The equivalent resistance for a conventional PIN junction is:

    V.sub.T /(I.sub.DC).sup.0.87.

The attenuation of the conventional PIN diode is

    Z.sub.O (I.sub.DC).sup.0.87 /V.sub.T +[Z.sub.O.sup.2 (I.sub.DC).sup.1.74 /V.sub.T.sup.2 +1].sup.1/2.

As can be inferred from the comparing the pn junction diode and PIN diode equations, the resistance of the PIN diode not only increases non-linearly, but increases less than the resistance of D₁.

A functional block diagram of the preferred embodiment of an RF attenuator of this invention is shown in FIG. 4. The RF attenuator includes a feedback loop connected from the RF output port, RF_(OUT), through a feedback control circuit portion 25, to the voltage control port P_(C). Feedback control portion 25 generates V_(DC) in proportion to the magnitude of the RF output signal detected at RF_(OUT). Accordingly, the control current, I_(DC), provided by voltage controlled current source 20' in accordance with V_(DC) is directly proportional to the height of the RF output. If the signal at RF_(OUT) gets too large, the gain of the received RF signal is reduced, and vice-versa.

FIG. 5 is a comparison plot of attenuation in dB versus control voltage, V_(DC), for the attenuator of this invention, i.e., formed with a pn junction diode D₁, and a conventional PIN diode-based attenuator. As is clearly seen in the figures, the plot of pn junction diode attenuation per V_(T) is more linear than that for the PIN diode. The plot is derived from testing the fully integrated silicon attenuator at 800 MHZ.

FIG. 6 is a plot of swept frequency insertion loss and return loss for the RF attenuator of this invention from 10 MHz to 1500 MHz for various control voltages V_(DC). The gain provided to the received signal at RF_(IN) is substantially linear over the entire bandwidth. According to FIGS. 5 and 6, the use of a pn junction diode in lieu of a PIN diode provides an attenuator that provides more effective and linear attenuation.

While the above embodiment has been described with particular transistors and limitations corresponding to the circuitry therewith, it is included for illustration purposes only and is not meant to limit the scope of this invention. The invention is to be limited only as defined by the claims. More particularly, while the RF attenuator provided hereby was described as including a voltage-to-current converter to provide shunt element biasing, the invention is not limited to structure according thereto. Any means known to those skilled in the art for providing current biasing to the shunt element within the T-pad to control RF attenuation may be used without departing from the scope and spirit of this invention. 

What is claimed is:
 1. An analog RF signal attenuator for controlling an amplitude of an RF signal based on a voltage control signal providing a voltage-to-current converter including a current mirror and an active load, said active load comprising a plurality of diode-connected transistors, said attenuator wholly integrable within a monolithic integrated circuit and including an RF input port, an RF output port and an RF shunt element, wherein an amount of signal gain is provided substantially linearly to said RF signal with linear variations of said voltage control signal.
 2. The analog RF signal attenuator defined by claim 1, wherein said voltage control signal is generated by signal generation means in proportion to a signal amplitude detected at said RF output port.
 3. The analog RF signal attenuator defined by claim 1, wherein said shunt element is a pn junction diode.
 4. The analog RF signal attenuator defined by claim 3, wherein said attenuation constant is approximately equal to:

    Z.sub.O /R.sub.pn +((Z.sub.O /R.sub.pn).sup.2 +1).sup.1/2,

where Z_(O) is the system impedance and R_(pn) is the junction resistance of the pn diode.
 5. The analog RF attenuator defined by claim 4, wherein R_(pn) equals V_(T) /I_(DC), V_(T) equals 26×10⁻³ volts and I_(DC) is the DC signal.
 6. The analog RF signal attenuator defined by claim 4, wherein a bandwidth of operation of said attenuator extends from 10 to 1500 MHz.
 7. The analog RF signal attenuator defined by claim 1, formed as a T structure.
 8. The analog RF signal attenuator defined by claim 1, wherein a bandwidth of said attenuator extends from 40 to 820 MHz and an attenuation performed thereby extends from 0 to 12 dB.
 9. The analog RF signal attenuator defined by claim 1, wherein said RF input and RF output ports include DC blocking capacitors.
 10. The analog RF signal attenuator defined by claim 1, wherein said RF input and RF output ports include variable resistors. 